The present disclosure relates to a memory element that stores therein information by utilizing such a property that a resistance value changes. The present disclosure also relates to a semiconductor device provided with such a memory element, and a writing method by which information is written to such a memory element.
In many cases, an OTP (One Time Programmable) memory to which data is allowed to be written only once, and an MTP (Multi-Time Programmable) memory to which data is allowed to be written two or more times, are integrated in a semiconductor integrated circuit. These types of memories may store therein, for example, trimming information used to adjust circuit properties. Thus, such a semiconductor integrated circuit is allowed to realize desirable properties, by making an adjustment based on the trimming information stored in a memory thereof, immediately after power-on. Further, an identification (ID) number of a semiconductor integrated circuit may also be stored to realize traceability of this semiconductor integrated circuit.
In a memory like those described above, an electrical fuse is often used as a memory element. In the electrical fuse, a resistance value is increased by application of a stress. Further, an antifuse may be used as a memory element in some cases. In the antifuse, a resistance value is decreased by application of a stress. Furthermore, a memory element may be configured using both the electrical fuse and the antifuse. For example, Japanese Unexamined Patent Application Publication No. 2000-174211 discloses a semiconductor trimming device in which an antifuse is connected in parallel, to a series circuit in which an electrical fuse and a resistor are connected in series. This semiconductor trimming device causes both terminals of the memory element to open, by increasing the resistance value of the electrical fuse, and also causes both terminals of the memory element to short-circuit, by decreasing the resistance value of the antifuse.